XNOR-SRAM: In-memory computing SRAM macro for binary/ternary deep neural networks S Yin, Z Jiang, JS Seo, M Seok IEEE Journal of Solid-State Circuits 55 (6), 1733-1743, 2020 | 472 | 2020 |
XNOR-RRAM: A scalable and parallel resistive synaptic architecture for binary neural networks X Sun, S Yin, X Peng, R Liu, J Seo, S Yu 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018 | 238 | 2018 |
C3SRAM: An in-memory-computing SRAM macro based on robust capacitive coupling computing mechanism Z Jiang, S Yin, JS Seo, M Seok IEEE Journal of Solid-State Circuits 55 (7), 1888-1897, 2020 | 208 | 2020 |
High-throughput in-memory computing for binary deep neural networks with monolithically integrated RRAM and 90-nm CMOS S Yin, X Sun, S Yu, J Seo IEEE Transactions on Electron Devices 67 (10), 4185-4192, 2020 | 123 | 2020 |
Monolithically integrated RRAM-and CMOS-based in-memory computing optimizations for efficient deep learning S Yin, Y Kim, X Han, H Barnaby, S Yu, Y Luo, W He, X Sun, JJ Kim, J Seo IEEE Micro 39 (6), 54-63, 2019 | 82 | 2019 |
A 1.06- W Smart ECG Processor in 65-nm CMOS for Real-Time Biometric Authentication and Personal Cardiac Monitoring S Yin, M Kim, D Kadetotad, Y Liu, C Bae, SJ Kim, Y Cao, J Seo IEEE Journal of Solid-State Circuits 54 (8), 2316-2326, 2019 | 78 | 2019 |
Algorithm and hardware design of discrete-time spiking neural networks based on back propagation with binary activations S Yin, SK Venkataramanaiah, GK Chen, R Krishnamurthy, Y Cao, ... 2017 IEEE Biomedical Circuits and Systems Conference (BioCAS), 1-5, 2017 | 73 | 2017 |
C3SRAM: In-memory-computing SRAM macro based on capacitive-coupling computing Z Jiang, S Yin, JS Seo, M Seok IEEE Solid-State Circuits Letters 2 (9), 131-134, 2019 | 60 | 2019 |
Vesti: Energy-efficient in-memory computing accelerator for deep neural networks S Yin, Z Jiang, M Kim, T Gupta, M Seok, JS Seo IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (1), 48-61, 2019 | 59 | 2019 |
Novel Vertical Channel-All-Around (CAA) In-Ga-Zn-O FET for 2T0C-DRAM With High Density Beyond 4F2 by Monolithic Stacking X Duan, K Huang, J Feng, J Niu, H Qin, S Yin, G Jiao, D Leonelli, X Zhao, ... IEEE Transactions on Electron Devices 69 (4), 2196-2202, 2022 | 55 | 2022 |
Automatic compiler based FPGA accelerator for CNN training SK Venkataramanaiah, Y Ma, S Yin, E Nurvithadhi, A Dasu, Y Cao, J Seo 2019 29th International Conference on Field Programmable Logic and …, 2019 | 54 | 2019 |
An 8.93 TOPS/W LSTM recurrent neural network accelerator featuring hierarchical coarse-grain sparsity for on-device speech recognition D Kadetotad, S Yin, V Berisha, C Chakrabarti, J Seo IEEE Journal of Solid-State Circuits 55 (7), 1877-1887, 2020 | 49 | 2020 |
2-bit-per-cell RRAM-based in-memory computing for area-/energy-efficient deep learning W He, S Yin, Y Kim, X Sun, JJ Kim, S Yu, JS Seo IEEE Solid-State Circuits Letters 3, 194-197, 2020 | 48 | 2020 |
ECG authentication hardware design with low-power signal processing and neural network optimization with low precision and structured compression SK Cherupally, S Yin, D Kadetotad, G Srivastava, C Bae, SJ Kim, J Seo IEEE transactions on biomedical circuits and systems 14 (2), 198-208, 2020 | 37* | 2020 |
PIMCA: A 3.4-Mb programmable in-memory computing accelerator in 28nm for on-chip DNN inference S Yin, B Zhang, M Kim, J Saikia, S Kwon, S Myung, H Kim, SJ Kim, ... 2021 Symposium on VLSI Technology, 1-2, 2021 | 34 | 2021 |
K-nearest neighbor hardware accelerator using in-memory computing SRAM J Saikia, S Yin, Z Jiang, M Seok, J Seo 2019 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2019 | 31 | 2019 |
A 2.6 TOPS/W 16-bit fixed-point convolutional neural network learning processor in 65-nm CMOS S Yin, JS Seo IEEE Solid-State Circuits Letters 3, 13-16, 2019 | 26 | 2019 |
FPGA-based low-batch training accelerator for modern CNNs featuring high bandwidth memory SK Venkataramanaiah, HS Suh, S Yin, E Nurvitadhi, A Dasu, Y Cao, ... Proceedings of the 39th International Conference on Computer-Aided Design, 1-8, 2020 | 25 | 2020 |
PIMCA: A programmable in-memory computing accelerator for energy-efficient DNN inference B Zhang, S Yin, M Kim, J Saikia, S Kwon, S Myung, H Kim, SJ Kim, JS Seo, ... IEEE Journal of Solid-State Circuits 58 (5), 1436-1449, 2022 | 19 | 2022 |
A smart hardware security engine combining entropy sources of ECG, HRV, and SRAM PUF for authentication and secret key generation SK Cherupally, S Yin, D Kadetotad, C Bae, SJ Kim, J Seo IEEE Journal of Solid-State Circuits 55 (10), 2680-2690, 2020 | 19 | 2020 |