Mark Ritter
Mark Ritter
IBM T.J. Watson Research Center
Verified email at
Cited by
Cited by
Exploitation of optical interconnects in future server architectures
AF Benner, M Ignatowski, JA Kash, DM Kuchta, MB Ritter
IBM Journal of research and development 49 (4.5), 755-775, 2005
Specifications of nanoscale devices and circuits for neuromorphic computational systems
B Rajendran, Y Liu, J Seo, K Gopalakrishnan, L Chang, DJ Friedman, ...
IEEE Transactions on Electron Devices 60 (1), 246-253, 2012
Physics-based via and trace models for efficient link simulation on multilayer structures up to 40 GHz
R Rimolo-Donadio, X Gu, YH Kwark, MB Ritter, B Archambeault, ...
IEEE Transactions on Microwave Theory and Techniques 57 (8), 2072-2083, 2009
Electro-optical connectors
MF Bregman, WD Brewer, MS Cohen, GW Johnson, IC Noyan, ...
US Patent 5,093,879, 1992
Stepped electronic device package
PW Cotues, PA Moskowitz, P Murphy, MB Ritter, GF Walker
US Patent 5,239,447, 1993
Three-dimensional architecture for self-checking and self-repairing integrated circuits
K Bernstein, PW Coteus, IAM Elfadel, PG Emma, KW Guarini, ...
US Patent App. 11/621,188, 2008
120-Gb/s VCSEL-based parallel-optical interconnect and custom 120-Gb/s testing station
DM Kuchta, YH Kwark, C Schuster, C Baks, C Haymes, J Schaub, ...
Journal of lightwave technology 22 (9), 2200, 2004
Is 25 Gb/s on-board signaling viable?
DG Kam, MB Ritter, TJ Beukema, JF Bulzacchelli, PK Pepeljugoski, ...
IEEE Transactions on advanced packaging 32 (2), 328-344, 2009
Multi-protocol agile framer
CL Haymes, MB Ritter, T Röwer
US Patent 6,654,383, 2003
Developing a" Physical" Model for Vias-Part II: Coupled and Ground Return Vias
G Selli, C Schuster, YH Kwark, MB Ritter, JL Drewniak
UBM Electronics 2, 972, 2007
Integrated circuit testing system having a cantilevered contact lead probe pattern mounted on a flexible tape for interconnecting an integrated circuit to a tester
MF Bregman, PR Hoffman, PG Ledermann, PA Moskowitz, RA Pollak, ...
US Patent 5,189,363, 1993
System for address-event-representation network simulation
MM Denneau, DJ Friedman, R Linsker, MB Ritter
US Patent 8,429,107, 2013
Method for extending bandwidth of large core fiber optic transmission links
MF Cina, DL Karst, MM Oprysko, MB Ritter, SL Spanoudis, JM Trewhella
US Patent 5,495,545, 1996
Wafer level I/O test, repair and/or customization enabled by I/O layer
K Bernstein, P Coteus, IM Elfadel, P Emma, D Friedman, R Puri, MB Ritter, ...
US Patent 7,913,202, 2011
Silicon-on-insulator (SOI) trench photodiode
YH Kwark, D Moy, MB Ritter, DL Rogers, JJ Welser
US Patent 6,538,299, 2003
SiGe BiCMOS integrated circuits for high-speed serial communication links
DJ Friedman, M Meghelli, BD Parker, J Yang, HA Ainspan, AV Rylyakov, ...
IBM Journal of Research and Development 47 (2.3), 259-282, 2003
Optical bus for computer systems
MF Bregman, IC Noyan, MB Ritter, HS Stone
US Patent 5,093,890, 1992
Optical technologies for data communication in large parallel systems
MB Ritter, Y Vlasov, JA Kash, A Benner
Journal of Instrumentation 6 (01), C01012, 2011
Data center and high performance computing interconnects for 100 Gb/s and beyond
P Pepeljugoski, F Doany, D Kuchta, L Schares, C Schow, M Ritter, J Kash
Optical fiber communication conference, OMR4, 2007
Electronic device elastomeric mounting and interconnection technology
RR Horton, IC Noyan, MJ Palmer, MB Ritter
US Patent 5,186,632, 1993
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