| Analyzing static and dynamic write margin for nanometer SRAMs J Wang, S Nalam, BH Calhoun Proceedings of the 2008 international symposium on Low Power Electronics …, 2008 | 248 | 2008 |
| Sub-threshold circuit design with shrinking CMOS devices BH Calhoun, S Khanna, R Mann, J Wang Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on …, 2009 | 89 | 2009 |
| Recursive Statistical Blockade: an enhanced technique for rare event simulation with application to SRAM circuit design A Singhee, J Wang, BH Calhoun, RA Rutenbar VLSI Design, 2008. VLSID 2008. 21st International Conference on, 131-136, 2008 | 85 | 2008 |
| Impact of circuit assist methods on margin and performance in 6T SRAM RW Mann, J Wang, S Nalam, S Khanna, G Braceras, H Pilo, BH Calhoun Solid-State Electronics 54 (11), 1398-1407, 2010 | 74 | 2010 |
| Statistical modeling for the minimum standby supply voltage of a full SRAM array J Wang, A Singhee, RA Rutenbar, BH Calhoun Solid State Circuits Conference, 2007. ESSCIRC 2007. 33rd European, 400-403, 2007 | 71 | 2007 |
| Techniques to Extend Canary-Based Standby Scaling for SRAMs to 45 nm and Beyond J Wang, BH Calhoun IEEE Journal of Solid-State Circuits 43 (11), 2514-2523, 2008 | 60 | 2008 |
| Canary replica feedback for near-DRV standby VDD scaling in a 90nm SRAM J Wang, BH Calhoun Custom Integrated Circuits Conference, 2007. CICC'07. IEEE, 29-32, 2007 | 49 | 2007 |
| SRAM-based NBTI/PBTI sensor system design Z Qi, J Wang, A Cabe, S Wooters, T Blalock, B Calhoun, M Stan Design Automation Conference (DAC), 2010 47th ACM/IEEE, 849-852, 2010 | 45 | 2010 |
| Two fast methods for estimating the minimum standby supply voltage for large SRAMs J Wang, A Singhee, RA Rutenbar, BH Calhoun IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010 | 41 | 2010 |
| Minimum supply voltage and yield estimation for large SRAMs under parametric variations J Wang, BH Calhoun IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19 (11 …, 2011 | 37 | 2011 |
| Reducing read data strobe latency in a memory system JS Liu, ML Snodgrass, JJ Wang, T Wang, W Zhu US Patent 7,292,500, 2007 | 31 | 2007 |
| VISDA: an open-source caBIG™ analytical tool for data clustering and beyond J Wang, H Li, Y Zhu, M Yousef, M Nebozhyn, M Showe, L Showe, J Xuan, ... Bioinformatics 23 (15), 2024-2027, 2007 | 27 | 2007 |
| Limits of bias based assist methods in nano-scale 6T SRAM RW Mann, S Nalam, J Wang, BH Calhoun Quality Electronic Design (ISQED), 2010 11th International Symposium on, 1-8, 2010 | 25 | 2010 |
| Analyzing and modeling process balance for sub-threshold circuit design JF Ryan, J Wang, BH Calhoun Proceedings of the 17th ACM Great Lakes symposium on VLSI, 275-280, 2007 | 23 | 2007 |
| Improving SRAM Vmin and yield by using variation-aware BTI stress J Wang, S Nalam, Z Qi, RW Mann, M Stan, BH Calhoun Custom Integrated Circuits Conference (CICC), 2010 IEEE, 1-4, 2010 | 22 | 2010 |
| Tracking on-chip age using distributed, embedded sensors SN Wooters, AC Cabe, Z Qi, J Wang, RW Mann, BH Calhoun, MR Stan, ... IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20 (11 …, 2012 | 21 | 2012 |
| An enhanced canary-based system with BIST for SRAM standby power reduction J Wang, A Hoefler, BH Calhoun IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19 (5), 909-914, 2011 | 16 | 2011 |
| Analyzing Sub-Threshold Bitcell Topologies and the Effects of Assist Methods on SRAM VMIN J Boley, J Wang, BH Calhoun Journal of Low Power Electronics and Applications 2 (2), 143-154, 2012 | 15 | 2012 |
| Standby supply voltage minimization for reliable nanoscale SRAMs J Wang, BH Calhoun INTECH Open Access Publisher, 2010 | 9* | 2010 |
| A 500-MHz low-power five-port CMOS register file J Wang, Q Zhang Proceedings of the 2003 Asia and South Pacific Design Automation Conference …, 2003 | 6 | 2003 |
