Effect of distributed directories in mesh interconnects M Horro, MT Kandemir, LN Pouchet, G Rodríguez, J Touriño 56th Annual Design Automation Conference (DAC), 2019 | 12 | 2019 |
Optimizing Coherence Traffic in Manycore Processors Using Closed-Form Caching/Home Agent Mappings S Kommrusch, M Horro, LN Pouchet, G Rodriguez, J Touriño IEEE Access 9, 28930-28945, 2021 | 6* | 2021 |
Simulating the Network Activity of Modern Manycores M Horro, G Rodríguez, J Touriño IEEE Access 7, 81195 - 81210, 2019 | 6 | 2019 |
Custom High-Performance Vector Code Generation for Data-Specific Sparse Computations M Horro, LN Pouchet, G Rodríguez, J Touriño 31st International Conference on Parallel Architectures and Compilation …, 2022 | 2 | 2022 |
MARTA: Multi-configuration Assembly pRofiler and Toolkit for performance Analysis M Horro, LN Pouchet, G Rodríguez, J Touriño IEEE International Symposium on Performance Analysis of Systems and Software …, 2022 | 2 | 2022 |
Manycore Architectures and SIMD Optimizations for High Performance Computing M Horro University of A Coruña, 2022 | 1 | 2022 |
Toolkit para (micro-)benchmarking y análisis de características de rendimiento en kernels M Horro, LN Pouchet, G Rodríguez, J Touriño Actas de las Jornadas SARTECO, 303-312, 2021 | 1* | 2021 |
Architectural exploration of heterogeneous memory systems M Horro, G Rodríguez, J Tourino, MT Kandemir arXiv preprint arXiv:1810.12573, 2018 | 1 | 2018 |
Study of the Intel Knights Landing (KNL) memory system tradeoffs M Horro, G Rodríguez, J Touriño, MT Kandemir Thirteenth International Summer School on Advanced Computer Architecture and …, 2017 | 1* | 2017 |
Exploring SIMD Instructions for Packing Random Vector Operands in Modern x86 CPUs M Horro, LN Pouchet, G Rodríguez, J Touriño Seventeenth International Summer School on Advanced Computer Architecture …, 2021 | | 2021 |
Exploración y optimización energética de arquitecturas heterogéneas con el framework gem5 M Horro, G Rodríguez, J Touriño Actas de las Jornadas SARTECO, 509-516, 2016 | | 2016 |