Frank Hannig

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Jürgen TeichFull Professor, Computer Science, Friedrich-Alexander-Universität Erlangen-NürnbergVerified email at cs.fau.de
Oliver ReicheFriedrich-Alexander University Erlangen-Nürnberg (FAU)Verified email at cs.fau.de
Alexandru TanaseFriedrich-Alexander-Universität Erlangen-NürnbergVerified email at cs.fau.de
Hritam DuttaProfessor of Embedded Systems Design, Georg Simon Ohm University of Applied SciencesVerified email at th-nuernberg.de
Richard MembarthProfessor at the Technische Hochschule IngolstadtVerified email at uni-saarland.de
vahid lariUniversity of Erlangen-NurembergVerified email at cs.fau.de
Christian SchmittFriedrich-Alexander-Universität Erlangen-NürnbergVerified email at cs.fau.de
Dr.-Ing. Éricles SousaCadence Design Systems, Inc.Verified email at bsd.com.br
Sascha RoloffHuawei Technologies Germany GmbHVerified email at huawei.com
Sebastian KuckukFriedrich-Alexander Universität Erlangen-NürnbergVerified email at fau.de
Srinivas BoppuIIT BhubaneswarVerified email at iitbbs.ac.in
M. Akif ÖzkanCadence Design SystemsVerified email at fau.de
Wieland EckertSiemens HealthineersVerified email at siemens-healthineers.com
Dirk KochSchool of Computer Science, University of ManchesterVerified email at recobus.de
Christian LengauerProfessor für Informatik, Universität PassauVerified email at uni-passau.de
Bo QiaoFriedrich-Alexander University Erlangen-Nürnberg (FAU)Verified email at fau.de
Ulrich RüdeProfessor for Computational Science and Engineering, FAU Erlangen-NürnbergVerified email at fau.de
Daniel ZienerProfessor for Computer Architecture and Embedded Systems, Technische Universität IlmenauVerified email at tu-ilmenau.de
Sven ApelProfessor of Computer Science, Saarland University, Saarland Informatics CampusVerified email at cs.uni-saarland.de
Matthias BoltenBergische Universität WuppertalVerified email at math.uni-wuppertal.de

Frank Hannig

Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU)

Verified email at cs.fau.de - Homepage

Embedded Systems Hardware/Software Co-Design Domain-specific Computing Parallelization High-Level Synthesis


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HIPA^cc: A Domain-Specific Language and Compiler for Image Processing R Membarth, O Reiche, F Hannig, J Teich, M Körner, W Eckert IEEE Transactions on Parallel and Distributed Systems 27 (1), 210-224, 2015	145	2015
Trends in data locality abstractions for HPC systems D Unat, A Dubey, T Hoefler, J Shalf, M Abraham, M Bianco, ... IEEE Transactions on Parallel and Distributed Systems 28 (10), 3007-3020, 2017	122	2017
A highly parameterizable parallel processor array architecture D Kissler, F Hannig, A Kupriyanov, J Teich 2006 IEEE International Conference on Field Programmable Technology, 105-112, 2006	103	2006
FPGAs for software programmers D Koch, F Hannig, D Ziener Springer, 2016	93	2016
Invasive tightly-coupled processor arrays: A domain-specific architecture/compiler co-design approach F Hannig, V Lari, S Boppu, A Tanase, O Reiche ACM Transactions on Embedded Computing Systems (TECS) 13 (4s), 1-29, 2014	90	2014
ExaStencils: Advanced stencil-code engineering C Lengauer, S Apel, M Bolten, A Größlinger, F Hannig, H Köstler, U Rüde, ... Euro-Par 2014: Parallel Processing Workshops: Euro-Par 2014 International …, 2014	88	2014
PARO: Synthesis of hardware accelerators for multi-dimensional dataflow-intensive applications F Hannig, H Ruckdeschel, H Dutta, J Teich Reconfigurable Computing: Architectures, Tools and Applications: 4th …, 2008	84	2008
ExaSlang: A domain-specific language for highly scalable multigrid solvers C Schmitt, S Kuckuk, F Hannig, H Köstler, J Teich 2014 Fourth international workshop on domain-specific languages and high …, 2014	73	2014
Power density-aware resource management for heterogeneous tiled multicores H Khdr, S Pagani, E Sousa, V Lari, A Pathania, F Hannig, M Shafique, ... IEEE Transactions on Computers 66 (3), 488-501, 2016	69	2016
Generating device-specific GPU code for local operators in medical imaging R Membarth, F Hannig, J Teich, M Körner, W Eckert 2012 IEEE 26th International Parallel and Distributed Processing Symposium …, 2012	66	2012
Code generation from a domain-specific language for C-based HLS of hardware accelerators O Reiche, M Schmid, F Hannig, R Membarth, J Teich Proceedings of the 2014 International Conference on Hardware/Software …, 2014	63	2014
Resource-aware programming and simulation of MPSoC architectures through extension of X10 F Hannig, S Roloff, G Snelting, J Teich, A Zwinkau Proceedings of the 14th International Workshop on Software and Compilers for …, 2011	54	2011
Generating FPGA-based image processing accelerators with Hipacc O Reiche, MA Özkan, R Membarth, J Teich, F Hannig 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD …, 2017	47	2017
Decentralized dynamic resource management support for massively parallel processor arrays V Lari, A Narovlyanskyy, F Hannig, J Teich ASAP 2011-22nd IEEE International Conference on Application-specific Systems …, 2011	45	2011
Towards domain-specific computing for stencil codes in HPC R Membarth, F Hannig, J Teich, H Köstler 2012 SC Companion: High Performance Computing, Networking Storage and …, 2012	43	2012
Design space exploration for massively parallel processor arrays F Hannig, J Teich International Conference on Parallel Computing Technologies, 51-65, 2001	43	2001
FPGA-based accelerator design from a domain-specific language MA Özkan, O Reiche, F Hannig, J Teich 2016 26th International Conference on Field Programmable Logic and …, 2016	40	2016
From loop fusion to kernel fusion: A domain-specific approach to locality optimization B Qiao, O Reiche, F Hannig, J Teich 2019 IEEE/ACM International Symposium on Code Generation and Optimization …, 2019	38	2019
Code generation for embedded heterogeneous architectures on Android R Membarth, O Reiche, F Hannig, J Teich 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014	38	2014
A Dynamically Reconfigurable Weakly Programmable Processor Array Architecture Template. D Kissler, F Hannig, A Kupriyanov, J Teich ReCoSoC, 31-37, 2006	37	2006

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