| Transparent offloading of computational hotspots from binary code to Xeon Phi M Damschen, H Riebler, G Vaz, C Plessl 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2015 | 23 | 2015 |
| Preemption of the partial reconfiguration process to enable real-time computing with FPGAs E Rossi, M Damschen, L Bauer, G Buttazzo, J Henkel ACM Transactions on Reconfigurable Technology and Systems (TRETS) 11 (2), 1-24, 2018 | 20 | 2018 |
| Timing analysis of tasks on runtime reconfigurable processors M Damschen, L Bauer, J Henkel IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (1), 294-307, 2016 | 19 | 2016 |
| CoRQ: Enabling runtime reconfiguration under WCET guarantees for real-time systems M Damschen, L Bauer, J Henkel IEEE Embedded Systems Letters 9 (3), 77-80, 2017 | 18 | 2017 |
| Co-scheduling on fused CPU-GPU architectures with shared last level caches M Damschen, F Mueller, J Henkel IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 16 | 2018 |
| Extending the WCET problem to optimize for runtime-reconfigurable processors M Damschen, L Bauer, J Henkel ACM Transactions on Architecture and Code Optimization (TACO) 13 (4), 1-24, 2016 | 15 | 2016 |
| Invasive computing for timing-predictable stream processing on MPSoCs S Wildermann, M Bader, L Bauer, M Damschen, D Gabriel, M Gerndt, ... it-Information Technology 58 (6), 267-280, 2016 | 8 | 2016 |
| Floating point acceleration for stream processing applications in dynamically reconfigurable processors L Bauer, A Grudnitsky, M Damschen, SR Kerekare, J Henkel 2015 13th IEEE Symposium on Embedded Systems for Real-time Multimedia …, 2015 | 8 | 2015 |
| i-Core: A Runtime-Reconfigurable Processor Platform for Cyber-Physical Systems M Damschen, M Rapp, L Bauer, J Henkel Embedded, Cyber-Physical, and IoT Systems: Essays Dedicated to Marilyn Wolf …, 2020 | 7 | 2020 |
| Auto-SI: an adaptive reconfigurable processor with run-time loop detection and acceleration T Harbaum, C Schade, M Damschen, C Tradowsky, L Bauer, J Henkel, ... 2017 30th IEEE International System-on-Chip Conference (SOCC), 153-158, 2017 | 7 | 2017 |
| Shallow water waves on a deep technology stack: Accelerating a finite volume tsunami model using reconfigurable hardware in invasive computing A Pöppl, M Damschen, F Schmaus, A Fried, M Mohr, M Blankertz, L Bauer, ... Euro-Par 2017: Parallel Processing Workshops: Euro-Par 2017 International …, 2018 | 6 | 2018 |
| Easy-to-use on-the-fly binary program acceleration on many-cores M Damschen, C Plessl arXiv preprint arXiv:1412.3906, 2014 | 6 | 2014 |
| WCET guarantees for opportunistic runtime reconfiguration M Damschen, L Bauer, J Henkel 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-6, 2019 | 4 | 2019 |
| Analyses and architectures for mixed-critical systems: industry trends and research perspective L Bauer, M Damschen, D Ziegenbein, A Hamann, A Biondi, G Buttazzo, ... Proceedings of the International Conference on Embedded Software Companion, 1-2, 2019 | 4 | 2019 |
| Worst-Case Execution Time Guarantees for Runtime-Reconfigurable Architectures M Damschen | 2 | 2019 |
| Bachelor thesis Concurrent shared memory access for Android applications and real-time processes M Damschen, S Oberthür, U Kastens, W Mauerer | 1 | 2012 |
| Master Thesis Easy-to-use on-the-fly binary program acceleration on many-cores M Damschen, JPDC Plessl, FM auf der Heide | | 2014 |
| Cuckoo Hashing M Damschen | | 2013 |
| Transactional Memory M Damschen | | 2013 |
| Worst-Case Execution Time Guarantees for Runtime-Reconfigurable Architectures M Damschen | | |
