System level hardware/software partitioning based on simulated annealing and tabu search P Eles, Z Peng, K Kuchcinski, A Doboli Design automation for embedded systems 2, 5-32, 1997 | 413 | 1997 |
LEneS: task scheduling for low-energy systems using variable supply voltage processors F Gruian, K Kuchcinski Proceedings of the 2001 Asia and South Pacific design automation conference …, 2001 | 274 | 2001 |
The WITAS unmanned aerial vehicle project P Doherty, G Granlund, K Kuchcinski, E Sandewall, K Nordberg, ... ECAI, 747-755, 2000 | 227 | 2000 |
Constraints-driven scheduling and resource assignment K Kuchcinski ACM Transactions on Design Automation of Electronic Systems (TODAES) 8 (3 …, 2003 | 211 | 2003 |
Scheduling of conditional process graphs for the synthesis of embedded systems P Eles, K Kuchcinski, Z Peng, A Doboli, P Pop Design, Automation, and Test in Europe: The Most Influential Papers of 10 …, 2008 | 195 | 2008 |
System synthesis with VHDL P Eles, K Kuchcinski, Z Peng Springer Science & Business Media, 2013 | 159 | 2013 |
Automated transformation of algorithms into register-transfer level implementations Z Peng, K Kuchcinski IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1994 | 148 | 1994 |
An algorithm for partitioning of application specific systems Z Peng, K Kuchcinski 1993 European Conference on Design Automation with the European Event in …, 1993 | 98 | 1993 |
Embedded system synthesis by timing constraints solving K Kuchcinski Proceedings. Tenth International Symposium on System Synthesis (Cat. No …, 1997 | 79 | 1997 |
Jacop-java constraint programming solver K Kuchcinski, R Szymanek CP Solvers: Modeling, Applications, Integration, and Standardization, co …, 2013 | 72 | 2013 |
Automatic selection of application-specific reconfigurable processor extensions C Wolinski, K Kuchcinski Proceedings of the conference on Design, automation and test in Europe, 1214 …, 2008 | 62 | 2008 |
Testability analysis and improvement from VHDL behavioral specifications X Gu, K Kuchcinski, Z Peng Universitetet i Linköping/Tekniska Högskolan i Linköping. Institutionen för …, 1994 | 62 | 1994 |
A constructive algorithm for memory-aware task assignment and scheduling R Szymanek, K Kuchcinski Proceedings of the ninth international symposium on Hardware/software …, 2001 | 49 | 2001 |
Synthesis of VHDL concurrent processes P Eles, M Minea, K Kuchcinski, Z Peng EURO-DAC 94, 540-545, 1994 | 49 | 1994 |
Time-energy design space exploration for multi-layer memory architectures R Szymanek, F Catthoor, K Kuchcinski Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004 | 46 | 2004 |
Hardware/software partitioning with iterative improvement heuristics P Eles, Z Peng, K Kuchcinski, A Doboli Proceedings of 9th International Symposium on Systems Synthesis, 71-76, 1996 | 46 | 1996 |
Compiling VHDL into a high-level synthesis design representation. P Eles, K Kuchcinski, Z Peng, M Minea EURO-DAC 92, 604-609, 1992 | 42 | 1992 |
Global approach to assignment and scheduling of complex behaviors based on HCDG and constraint programming K Kuchcinski, C Wolinski Journal of Systems Architecture 49 (12-15), 489-503, 2003 | 37 | 2003 |
Constraints-driven design space exploration for distributed embedded systems K Kuchcinski Journal of Systems Architecture 47 (3-4), 241-261, 2001 | 36 | 2001 |
Design space exploration in system level synthesis under memory constraints R Szymanek, K Kuchcinski Proceedings 25th EUROMICRO Conference. Informatics: Theory and Practice for …, 1999 | 36 | 1999 |