srinivas kumar reddy
srinivas kumar reddy
Digital Design Engineer, Texas Instruments
Verified email at ti.com
Title
Cited by
Cited by
Year
Dual-stage power management algorithms for energy harvesting sensors
S Reddy, CR Murthy
IEEE Transactions on Wireless Communications 11 (4), 1434-1445, 2012
642012
Profile-based load scheduling in wireless energy harvesting sensors for data rate maximization
S Reddy, CR Murthy
2010 IEEE international conference on communications, 1-5, 2010
342010
Duty cycling and power management with a network of energy harvesting sensors
S Reddy, CR Murthy
2011 4th IEEE International Workshop on Computational Advances in Multi …, 2011
112011
Histogram based error estimation and correction
V Nagarajan, SKR Naru, RKV Parupudi
US Patent 9,748,966, 2017
92017
Gain and memory error estimation in a pipeline analog to digital converter
SKR Naru, N Rajagopal, S Dusad, V Nagarajan, VA Pentakota
US Patent 10,541,700, 2020
22020
Sample based gain error estimation for analog to digital converter
SKR Naru, N Viswanathan, V Pentakota
US Patent 10,530,378, 2020
12020
Error correcting analog-to-digital converters
V Nagarajan, SKR Naru, N Rajagopal
US Patent 10,103,753, 2018
12018
Gain and offset correction in an interpolation ADC
SKR Naru, N Viswanathan, V Pentakota
US Patent 9,479,186, 2016
12016
Gain correction for multi-bit successive-approximation register
SKR Naru, AJ George, S Dusad, VA Pentakota
US Patent App. 16/997,975, 2020
2020
Gain correction for multi-bit successive-approximation register
SKR Naru, AJ George, S Dusad, VA Pentakota
US Patent 10,790,841, 2020
2020
Gain and memory error estimation in a pipeline analog to digital converter
SKR Naru, N Rajagopal, S Dusad, V Nagarajan, VA Pentakota
US Patent App. 16/714,835, 2020
2020
Error correcting analog-to-digital converters
V Nagarajan, SKR Naru, N Rajagopal
US Patent 10,419,036, 2019
2019
Delay modulated clock division
J Balakrishnan, S Dusad, V Pentakota, SKR Naru, SS Gunturi, ...
US Patent App. 16/417,827, 2019
2019
Delay modulated clock division
J Balakrishnan, S Dusad, V Pentakota, SKR Naru, SS Gunturi, ...
US Patent 10,341,082, 2019
2019
Pattern based estimation of errors in ADC
SKR Naru, VP Appala, S Dusad, N Shrivastava, V Nagarajan, A Xavier, ...
US Patent 10,320,405, 2019
2019
Multiplier-based programmable filters
S Rangachari, J Balakrishnan, J Tangudu, SKR Naru
US Patent 10,305,451, 2019
2019
Pattern based estimation of errors in ADC
SKR Naru, VP Appala, S Dusad, N Shrivastava, V Nagarajan, A Xavier, ...
US Patent 9,941,893, 2018
2018
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