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Adrien Prost-Boucle
Adrien Prost-Boucle
TIMA Laboratory, CNRS
Verified email at univ-grenoble-alpes.fr
Title
Cited by
Cited by
Year
Ternary neural networks for resource-efficient AI applications
H Alemdar, V Leroy, A Prost-Boucle, F Pétrot
2017 international joint conference on neural networks (IJCNN), 2547-2554, 2017
2692017
Scalable high-performance architecture for convolutional ternary neural networks on FPGA
A Prost-Boucle, A Bourge, F Pétrot, H Alemdar, N Caldwell, V Leroy
2017 27Th International conference on field programmable logic and …, 2017
952017
Fast and standalone design space exploration for high-level synthesis under resource constraints
A Prost-Boucle, O Muller, F Rousseau
Journal of Systems Architecture 60 (1), 79-93, 2014
512014
High-efficiency convolutional ternary neural networks with custom adder trees and weight compression
A Prost-Boucle, A Bourge, F Pétrot
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 11 (3), 1-24, 2018
292018
A fast and autonomous HLS methodology for hardware accelerator generation under resource constraints
A Prost-Boucle, O Muller, F Rousseau
2013 Euromicro Conference on Digital System Design, 201-208, 2013
212013
Overview of the state of the art in embedded machine learning
L Andrade, A Prost-Boucle, F Pétrot
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018
162018
Efficient and versatile fpga acceleration of support counting for stream mining of sequences and frequent itemsets
A Prost-Boucle, F Pétrot, V Leroy, H Alemdar
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 10 (3), 1-25, 2017
112017
Efficient decompression of binary encoded balanced ternary sequences
O Muller, A Prost-Boucle, A Bourge, F Pétrot
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (8 …, 2019
62019
On-board non-regression test of HLS tools targeting FPGA
A Wicaksana, A Prost-Boucle, O Muller, F Rousseau, A Sasongko
Proceedings of the 27th International Symposium on Rapid System Prototyping …, 2016
62016
HLS-based methodology for fast iterative development applied to elliptic curve arithmetic
S Pontie, A Bourge, A Prost-Boucle, P Maistri, O Muller, R Leveugle, ...
2016 Euromicro Conference on Digital System Design (DSD), 511-518, 2016
52016
Génération rapide d'accélerateurs matériels par synthèse d'architecture sous contraintes de ressources
A Prost-Boucle
Université de Grenoble, 2014
32014
A fast and stand-alone HLS methodology for hardware accelerator generation under resource constraints
A Prost-Boucle, O Müller, F Rousseau
Journal of systems architecture, 2014
22014
The 3x+ 1 problem: Existence of cycles under assumption of distance between odd values
A Prost-Boucle
12018
Méthodologie de génération rapide et automatique d’accélérateurs matériels sous contraintes de ressources: progression itérative et gloutonne
A Prost-Boucle, O Muller, F Rousseau
Conférence en Parallélisme, Architecture et Système (ComPAS'13), 2013
12013
A new automated instrumentation for emulation-based fault injection
R Leveugle, A Prost-Boucle
2010 First IEEE Latin American Symposium on Circuits and Systems (LASCAS …, 2010
12010
Inside the AI Accelerators: From High Performance to Energy Efficiency
A Pinzari, A Prost-Boucle, C Rabache, F Pétrot
Advancing Edge Artificial Intelligence, 87-103, 2024
2024
Présentation du GIP-CNFM-CIME Nanotech
A Aitoumeri
Abdelhamid Aitoumeri, 2023
2023
Hardware-friendly AI algorithms: Ternary Neural Networks
F Pétrot, A Prost-Boucle, A Bourge, LLA Porras, T Baumela, A Pinzari
HiPEAC Computing Systems Week (HiPEAC 2021), 2021
2021
High-Throughput and High-Accuracy Classification with Convolutional Ternary Neural Networks
F Pétrot, A Prost-Boucle, A Bourge
International Workshop on Highly Efficient Neural Processing (HENP'2018), 2018
2018
High-Throughput Ternary CNN on FPGA: Low Level Optimizations and Compression
F Pétrot, A Prost-Boucle, A Bourge
18th International Forum on MPSoC (MPSoC'2018), 2018
2018
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