Miriam Leeser
Miriam Leeser
Professor of Computer Engineering, Northeastern University
Verified email at - Homepage
Cited by
Cited by
FINN-R An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networks
M Blott, TB Preußer, NJ Fraser, G Gambardella, K O’brien, Y Umuroglu, ...
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 11 (3), 1-23, 2018
Algorithmic transformations in the implementation of k-means clustering on reconfigurable hardware
M Estlick, M Leeser, J Theiler, JJ Szymanski
Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field …, 2001
A library of parameterized floating-point modules and their use
P Belanović, M Leeser
Field-Programmable Logic and Applications: Reconfigurable Computing Is Going …, 2002
Parallel-beam backprojection: an FPGA implementation optimized for medical imaging
S Coric, M Leeser, E Miller, M Trepanier
Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field …, 2002
Validity and reliability of Kinect skeleton for measuring shoulder joint angles: a feasibility study
ME Huber, AL Seitz, M Leeser, D Sternad
Physiotherapy 101 (4), 389-393, 2015
Area and performance tradeoffs in floating-point divide and square-root implementations
P Soderquist, M Leeser
ACM Computing Surveys (CSUR) 28 (3), 518-564, 1996
An FPGA implementation of the two-dimensional finite-difference time-domain (FDTD) algorithm
W Chen, P Kosmas, M Leeser, C Rappaport
Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field …, 2004
Division and square root: choosing the right implementation
P Soderquist, M Leeser
IEEE Micro 17 (4), 56-66, 1997
HML, a novel hardware description language and its translation to VHDL
Y Li, M Leeser
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 8 (1), 1-8, 2000
Accelerating big data applications using lightweight virtualization framework on enterprise cloud
J Bhimani, Z Yang, M Leeser, N Mi
2017 IEEE High Performance Extreme Computing Conference (HPEC), 1-7, 2017
Accelerating K-Means clustering with parallel implementations and GPU computing
J Bhimani, M Leeser, N Mi
2015 IEEE high performance extreme computing conference (HPEC), 1-6, 2015
Smart camera based on reconfigurable hardware enables diverse real-time applications
M Leeser, S Miller, H Yu
12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines …, 2004
Interconnection network for multiple processors
DC Scavezze, ME Leeser, GA Kammerer, WR Prescott
US Patent 4,967,344, 1990
The future of FPGA acceleration in datacenters and the cloud
C Bobda, JM Mbongue, P Chow, M Ewais, N Tarafdar, JC Vega, K Eguro, ...
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 15 (3), 1-42, 2022
Vfloat: A variable precision fixed-and floating-point library for reconfigurable hardware
X Wang, M Leeser
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 3 (3), 1-34, 2010
Advanced components in the variable precision floating-point library
X Wang, S Braganza, M Leeser
2006 14th Annual IEEE Symposium on Field-Programmable Custom Computing …, 2006
Fim: performance prediction for parallel computation in iterative data processing applications
J Bhimani, N Mi, M Leeser, Z Yang
2017 IEEE 10th International conference on cloud computing (CLOUD), 359-366, 2017
Rothko: A three-dimensional FPGA
M Leeser, WM Meleis, MM Vai, S Chiricescu, W Xu, PM Zavracky
IEEE Design & Test of Computers 15 (1), 16-23, 1998
Non-restoring integer square root: A case study in design by principled optimization
J O'Leary, M Leeser, J Hickey, M Aagaard
International Conference on Theorem Provers in Circuit Design, 52-71, 1994
Optimizing the data cache performance of a software MPEG-2 video decoder
P Soderquist, M Leeser
Proceedings of the fifth ACM international conference on Multimedia, 291-301, 1997
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