Gidon Ernst
Gidon Ernst
Software and Computational Systems Lab, LMU Munich
Verified email at - Homepage
Cited by
Cited by
KIV: overview and VerifyThis competition
G Ernst, J Pfähler, G Schellhorn, D Haneberg, W Reif
International Journal on Software Tools for Technology Transfer 17 (6), 677-694, 2015
Two-layered falsification of hybrid systems guided by monte carlo tree search
Z Zhang, G Ernst, S Sedwards, P Arcaini, I Hasuo
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018
Optimized java binary and virtual machine for tiny motes
F Aslam, L Fennell, C Schindelhauer, P Thiemann, G Ernst, E Haussmann, ...
International Conference on Distributed Computing in Sensor Systems, 15-30, 2010
Introducing TakaTuka: a Java virtualmachine for motes
F Aslam, C Schindelhauer, G Ernst, D Spyra, J Meyer, M Zalloom
Proceedings of the 6th ACM conference on Embedded network sensor systems …, 2008
The COST IC0701 verification competition 2011
T Bormer, M Brockschmidt, D Distefano, G Ernst, JC Filliâtre, R Grigore, ...
International Conference on Formal Verification of Object-Oriented Software …, 2011
Interleaved programs and rely-guarantee reasoning with ITL
G Schellhorn, B Tofan, G Ernst, W Reif
2011 Eighteenth International Symposium on Temporal Representation and …, 2011
Development of a verified flash file system
G Schellhorn, G Ernst, J Pfähler, D Haneberg, W Reif
International Conference on Abstract State Machines, Alloy, B, TLA, VDM, and …, 2014
Verification of a virtual filesystem switch
G Ernst, G Schellhorn, D Haneberg, J Pfähler, W Reif
Working Conference on Verified Software: Theories, Tools, and Experiments …, 2013
ARCH-COMP 2019 Category Report: Falsification.
G Ernst, P Arcaini, A Donze, G Fainekos, L Mathesen, G Pedrielli, ...
ARCH@ CPSIoTWeek, 129-140, 2019
Arch-comp 2020 category report: Falsification
G Ernst, P Arcaini, I Bennani, A Donze, G Fainekos, G Frehse, L Mathesen, ...
EPiC Series in Computing, 2020
RGITL: A temporal logic framework for compositional reasoning about interleaved programs
G Schellhorn, B Tofan, G Ernst, J Pfähler, W Reif
Annals of Mathematics and Artificial Intelligence 71 (1), 131-174, 2014
Inside a verified flash file system: transactions and garbage collection
G Ernst, J Pfähler, G Schellhorn, W Reif
VSSTE, 73-93, 2015
Fast falsification of hybrid systems using probabilistically adaptive input
G Ernst, S Sedwards, Z Zhang, I Hasuo
International Conference on Quantitative Evaluation of Systems, 165-181, 2019
SecCSL: Security Concurrent Separation Logic
G Ernst, T Murray
International Conference on Computer Aided Verification, 208-230, 2019
ARCH-COMP18 Category Report: Results on the Falsification Benchmarks.
A Dokhanchi, S Yaghoubi, B Hoxha, G Fainekos, G Ernst, Z Zhang, ...
ARCH@ ADHS, 104-109, 2018
Modular, crash-safe refinement for ASMs with submachines
G Ernst, J Pfähler, G Schellhorn, W Reif
Science of Computer Programming 131, 3-21, 2016
A formal model of a virtual filesystem switch
G Ernst, G Schellhorn, D Haneberg, J Pfähler, W Reif
arXiv preprint arXiv:1211.6187, 2012
Formal specification of an erase block management layer for flash memory
J Pfähler, G Ernst, G Schellhorn, D Haneberg, W Reif
Haifa Verification Conference, 214-229, 2013
Crash-safe refinement for a verified flash file system
J Pfähler, G Ernst, G Schellhorn, D Haneberg, W Reif
VerifyThis–verification competition with a human factor
G Ernst, M Huisman, W Mostowski, M Ulbrich
International Conference on Tools and Algorithms for the Construction and …, 2019
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