| Hardware-assisted incremental checkpointing in speculative parallel discrete event simulation S Carnà, S Ferracci, E De Santis, A Pellegrini, F Quaglia 2019 Winter Simulation Conference (WSC), 2759-2770, 2019 | 10 | 2019 |
| Fight Hardware with Hardware: Systemwide Detection and Mitigation of Side-channel Attacks Using Performance Counters S Carnà, S Ferracci, F Quaglia, A Pellegrini Digital Threats: Research and Practice 4 (1), 1-24, 2023 | 7 | 2023 |
| Reproducibility report for the paper: Partial evaluation via code generation for static stochastic reaction network Models S Carnà Proceedings of the 2020 ACM SIGSIM Conference on Principles of Advanced …, 2020 | 1 | 2020 |
| Strategies and software support for the management of hardware performance counters S Carnà, R Marotta, A Pellegrini, F Quaglia Software: Practice and Experience 53 (10), 1928-1957, 2023 | | 2023 |
| Don’t be Paranoid: Dynamic Detection and Mitigation for Threats Exploiting Cache-based Side-channel Attacks S Carnà, S Ferracci, F Quaglia, A Pellegrini ACACES 2020, Poster Abstracts, 35-38, 2020 | | 2020 |
| HOP-Hardware-based Online Profiling of multi-threaded applications via AMD Instruction-Based Sampling S Carnà Sapienza, University of Rome, 2018 | | 2018 |
| Methodologies and techniques for on-line exploitation of Performance Monitor Units in modern computing systems F Quaglia, S Carnà, A Pellegrini, AP XXX | | |
