| Low-latency reconfigurable entropy digital true random number generator with bias detection and correction LB Carreira, P Danielson, AA Rahimi, M Luppe, S Gupta IEEE Transactions on Circuits and Systems I: Regular Papers 67 (5), 1562-1575, 2020 | 23 | 2020 |
| Low-noise amplifier for deep-brain stimulation (DBS) TM Nordi, RH Gounella, M Luppe, JNS Junior, ET Fonoff, E Colombari, ... Electronics 11 (6), 939, 2022 | 11 | 2022 |
| Parallel implementation of exact dilations and multi-scale skeletonization M Luppe, L da Fontoura Costa, VO Roda Real-Time Imaging 9 (3), 163-169, 2003 | 8 | 2003 |
| Fractal dimension based on Minkowski‐Bouligand method using exponential dilations M Luppe Electronics Letters 51 (6), 475-477, 2015 | 7 | 2015 |
| FPGA implementation of a pseudorandom number generator based on k–logistic map MMA Kotaki, M Luppe 2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS), 1-4, 2020 | 4 | 2020 |
| Charge-pump circuit in 65nm CMOS for neural stimulation on deep-brain stimulation TM Nordi, VM Barbosa, RH Gounella, G Asan, M Luppe, J Navarro, ... 2021 XXXVI Conference on Design of Circuits and Integrated Systems (DCIS), 1-4, 2021 | 3 | 2021 |
| Weed segmentation in sugarcane crops using Mask R-CNN through aerial images GA Mini, DO Sales, M Luppe 2020 International Conference on Computational Science and Computational …, 2020 | 3 | 2020 |
| Design of a low power 10-bit 12MS/s asynchronous SAR ADC in 65nm CMOS AL Campos, J Navarro, M Luppe Proceedings of the 32nd Symposium on Integrated Circuits and Systems Design, 1-6, 2019 | 3 | 2019 |
| Designing an engineering laboratory course for problem based learning E Gesualdo, L Maximiliam, VA Oliveira J Eng Educ Transform, 2017 | 2 | 2017 |
| Architecture for fractal dimension estimation based on Minkowski-Bouligand method using integer distances I Rossales, M Luppe 2016 IEEE 27th International Conference on Application-specific Systems …, 2016 | 2 | 2016 |
| Arquiteturas para dilatação exata M Luppe Universidade de São Paulo, 2003 | 2 | 2003 |
| Custom ASIC Design for SHA-256 Using Open-Source Tools LD Franck, GA Ginja, JP Carmo, JA Afonso, M Luppe Computers 13 (1), 9, 2023 | 1 | 2023 |
| A low-power 10-bit 0.01-to-12-MS/s asynchronous SAR ADC in 65-nm CMOS AL Campos, J Navarro, M Luppe, ER de Lima Analog Integrated Circuits and Signal Processing 106, 321-337, 2021 | 1 | 2021 |
| Performance Comparison of High-Speed Dual Modulus Prescalers Using Metaheuristic Sizing/Optimization J Navarro, M Luppe 2020 33rd Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6, 2020 | 1 | 2020 |
| Restructuring the digital systems laboratory in computer engineering course KG Lima, M Luppe International Journal on Alive Engineering Education 5 (1), 51-58, 2018 | 1 | 2018 |
| Aerial Image Mosaics Construction Using Heterogeneous Computing for Agricultural Applications LR Candido, M Luppe, LAC Jorge ENVIROSENS 2016 : the International Symposium on Remote Sensing for Climate …, 2016 | 1 | 2016 |
| Desenvolvimento de um processador pipeline dedicado para extração de bordas em tempo real M Luppe, V Obac Roda | 1 | 1997 |
| Low-Noise Amplifier and Neurostimulator in submicron CMOS for Closed-Loop Deep-Brain Stimulation (CLDBS) TM Nordi, RH Gounella, GA Ginja, ML Amorim, M Luppe, JN Junior, ... Preprints, 2023 | | 2023 |
| Implementação do algoritmo SHA-256 em circuito integrado de aplicação específica LD Franck, M Luppe Livro de Resumos Expandidos, 2023 | | 2023 |
| Carmo, JPPd Low-Noise Amplifier for Deep-Brain Stimulation (DBS). Electronics 2022, 11, 939 TM Nordi, RH Gounella, M Luppe, JNS Junior, ET Fonoff, E Colombari, ... s Note: MDPI stays neutral with regard to jurisdictional claims in published …, 2022 | | 2022 |
João Navarro Soares Jr.Escola de Engenharia de São Carlos, USPVerified email at sc.usp.br
