| SOI FET design to reduce transient bipolar current MMA Pelella, F Assaderaghi, LF Wagner Jr US Patent 5,770,881, 1998 | 271 | 1998 |
| Methods to enhance SOI SRAM cell stability CM Hsieh, LL Hsu, JA Mandelman, MMA Pelella US Patent 5,774,411, 1998 | 171 | 1998 |
| Floating-body effects in partially depleted SOI CMOS circuits PF Lu, CT Chuang, J Ji, LF Wagner, CM Hsieh, JB Kuang, LLC Hsu, ... IEEE Journal of Solid-State Circuits 32 (8), 1241-1253, 1997 | 114 | 1997 |
| Field Effect Diode (FED): A novel device for ESD protection in deep sub-micron SOI technologies AA Salman, SG Beebe, M Emam, MM Pelella, DE Ioannou 2006 International Electron Devices Meeting, 1-4, 2006 | 84 | 2006 |
| Physical modeling of temperature dependences of SOI CMOS devices and circuits including self-heating GO Workman, JG Fossum, S Krishnan, MM Pelella IEEE Transactions on Electron Devices 45 (1), 125-133, 1998 | 58 | 1998 |
| Methods for fabricating a stressed MOS device I Peidous, MM Pelella US Patent 7,902,008, 2011 | 53 | 2011 |
| Low-voltage transient bipolar effect induced by dynamic floating-body charging in scaled PD/SOI MOSFETs MM Pelella, JG Fossum, D Suh, S Krishnan, KA Jenkins, MJ Hargrove IEEE Electron Device Letters 17 (5), 196-198, 1996 | 53 | 1996 |
| On the performance advantage of PD/SOI CMOS with floating bodies MM Pelella, JG Fossum IEEE Transactions on Electron Devices 49 (1), 96-104, 2002 | 49 | 2002 |
| Transient pass-transistor leakage current in SOI MOSFET's F Assaderaghi, GG Shahidi, L Wagner, M Hsieh, M Pelella, S Chu, ... IEEE Electron Device Letters 18 (6), 241-243, 1997 | 41 | 1997 |
| Low-voltage transient bipolar effect induced by dynamic floating-body charging in PD/SOI MOSFETs MM Pelella, JG Fossum, D Suh, S Krishnan, KA Jenkins 1995 IEEE International SOI Conference Proceedings, 8-9, 1995 | 38 | 1995 |
| Silicide MOSFET architecture and method of manufacture MM Pelella, S Sinha, SS Chan US Patent 6,642,119, 2003 | 37 | 2003 |
| Scalable PD/SOI CMOS with floating bodies JG Fossum, MM Pelella, S Krishnan IEEE Electron Device Letters 19 (11), 414-416, 1998 | 34 | 1998 |
| Electrostatic discharge protection device MM Pelella, RW Young, G Fiorenza, MJ Saccamango US Patent 5,504,362, 1996 | 34 | 1996 |
| Design and characterization of ESD protection devices for high-speed I/O in advanced SOI technology S Cao, AA Salman, JH Chun, SG Beebe, MM Pelella, RW Dutton IEEE transactions on electron devices 57 (3), 644-653, 2010 | 33 | 2010 |
| Methods for fabricating a stressed MOS device I Peidous, A Sultan, M Pelella US Patent App. 11/191,684, 2007 | 29 | 2007 |
| Process for fabricating a MOS device having protection against electrostatic discharge MMA Pelella US Patent 5,366,908, 1994 | 26 | 1994 |
| Hysteresis in floating-body PD/SOI CMOS circuits MM Pelella, CT Chuang, C Tretz, BW Curran, MG Rosenfield 1999 International Symposium on VLSI Technology, Systems, and Applications …, 1999 | 25 | 1999 |
| Method for forming a complementary bipolar transistor structure including a self-aligned vertical PNP transistor RK Cook, CM Hsieh, K Isihara, MM Pelella US Patent 4,997,775, 1991 | 25 | 1991 |
| Method for fabricating SOI device MM Pelella US Patent 7,361,534, 2008 | 24 | 2008 |
| Integrated photodiode for semiconductor substrates G Steinbrueck, JS Vickers, MM Pelella, M Aghababazadeh, N Pakdaman US Patent 8,410,568, 2013 | 23 | 2013 |
