| A natively flexible 32-bit Arm microprocessor J Biggs, J Myers, J Kufel, E Ozer, S Craske, A Sou, C Ramsdale, ... Nature 595 (7868), 532-536, 2021 | 208 | 2021 |
| A subthreshold ARM cortex-M0+ subsystem in 65 nm CMOS for WSN applications with 14 power domains, 10T SRAM, and integrated voltage regulator J Myers, A Savanth, R Gaddh, D Howard, P Prabhat, D Flynn IEEE Journal of Solid-State Circuits 51 (1), 31-44, 2015 | 105 | 2015 |
| 8.1 An 80nW retention 11.7 pJ/cycle active subthreshold ARM Cortex-M0+ subsystem in 65nm CMOS for WSN applications J Myers, A Savanth, D Howard, R Gaddh, P Prabhat, D Flynn 2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015 | 97 | 2015 |
| A hardwired machine learning processing engine fabricated with submicron metal-oxide thin-film transistors on a flexible substrate E Ozer, J Kufel, J Myers, J Biggs, G Brown, A Rana, A Sou, C Ramsdale, ... Nature Electronics 3 (7), 419-425, 2020 | 88 | 2020 |
| Device and technology implications of the Internet of Things R Aitken, V Chandra, J Myers, B Sandhu, L Shifren, G Yeric 2014 symposium on VLSI technology (VLSI-technology): digest of technical …, 2014 | 85 | 2014 |
| Ultra-low power 18-transistor fully static contention-free single-phase clocked flip-flop in 65-nm CMOS Y Cai, A Savanth, P Prabhat, J Myers, AS Weddell, TJ Kazmierski IEEE Journal of Solid-State Circuits 54 (2), 550-559, 2018 | 70 | 2018 |
| Embedded memory and ARM cortex-M0 core using 60-nm C-axis aligned crystalline indium–gallium–zinc oxide FET integrated with 65-nm Si CMOS T Onuki, W Uesugi, A Isobe, Y Ando, S Okamoto, K Kato, TR Yew, JY Wu, ... IEEE Journal of Solid-State Circuits 52 (4), 925-932, 2017 | 65 | 2017 |
| 5.6 A 0.68 nW/kHz supply-independent Relaxation Oscillator with±0.49%/V and 96ppm/° C stability A Savanth, J Myers, A Weddell, D Flynn, B Al-Hashimi 2017 IEEE International Solid-State Circuits Conference (ISSCC), 96-97, 2017 | 43 | 2017 |
| A 12.4 pJ/cycle sub-threshold, 16pJ/cycle near-threshold ARM Cortex-M0+ MCU with autonomous SRPG/DVFS and temperature tracking clocks J Myers, A Savanth, P Prabhat, S Yang, R Gaddh, SO Toh, D Flynn 2017 Symposium on VLSI Circuits, C332-C333, 2017 | 35 | 2017 |
| A sub-nW/kHz relaxation oscillator with ratioed reference and sub-clock power gated comparator A Savanth, AS Weddell, J Myers, D Flynn, BM Al-Hashimi IEEE Journal of Solid-State Circuits 54 (11), 3097-3106, 2019 | 31 | 2019 |
| Active mode subclock power gating JN Mistry, J Myers, BM Al-Hashimi, D Flynn, J Biggs, GV Merrett IEEE Transactions on very large scale Integration (VLSI) Systems 22 (9 …, 2013 | 30 | 2013 |
| 27.2 M0N0: A performance-regulated 0.8-to-38MHz DVFS ARM cortex-M33 SIMD MCU with 10nW sleep power P Prabhat, B Labbe, G Knight, A Savanth, J Svedas, MJ Walker, S Jeloka, ... 2020 IEEE International Solid-State Circuits Conference-(ISSCC), 422-424, 2020 | 28 | 2020 |
| Latching device and method PAK Savanth, JE Myers, S Das US Patent 9,734,895, 2017 | 27 | 2017 |
| CES-based latching circuits RC Aitken, V Chandra, BS Sandhu, GMN Lattimore, S Das, JP Biggs, ... US Patent 9,786,370, 2017 | 26 | 2017 |
| Integrated circuit, method of generating a layout of an integrated circuit using standard cells, and a standard cell library providing such standard cells JP Biggs, JE Myers, DW Howard, DW Flynn, C Tradowsky US Patent 8,451,026, 2013 | 24 | 2013 |
| Integrated circuit with power gating JE Myers, DW Flynn US Patent 8,456,223, 2013 | 18 | 2013 |
| Bespoke machine learning processor development framework on flexible substrates E Ozer, J Kufel, J Biggs, G Brown, J Myers, A Rana, A Sou, C Ramsdale 2019 IEEE international conference on flexible and printable sensors and …, 2019 | 17 | 2019 |
| Binary neural network as a flexible integrated circuit for odour classification E Ozer, J Kufel, J Biggs, J Myers, C Reynolds, G Brown, A Rana, A Sou, ... 2020 IEEE International Conference on Flexible and Printable Sensors and …, 2020 | 16 | 2020 |
| Embedded SRAM and Cortex-M0 core using a 60-nm crystalline oxide semiconductor H Tamura, K Kato, T Ishizu, W Uesugi, A Isobe, N Tsutsui, Y Suzuki, ... IEEE micro 34 (6), 42-53, 2014 | 16 | 2014 |
| Power gating in an electronic device JE Myers, DW Flynn, DW Howard US Patent 9,720,434, 2017 | 15 | 2017 |
